Tanvir Arafin

prof_pic.jpg

322 Research Hall

10401 York River Road

Fairfax, VA 22030

I am a tenure-track Assistant Professor at the Department of Cyber Security Engineering at George Mason University.

Our research explores security opportunities in emerging computer architecture, examines the weaknesses in autonomous systems, and builds hardware-derived primitives for developing trusted computation frameworks.

Our work has been published at flagship venues in hardware design and security, such as IEEE Transactions on Very Large Scale Integration Systems (TVLSI), IEEE Transaction of Computers (TC), ACM International Conference on Computer-Aided Design (ICCAD), and Asia and South Pacific Design Automation Conference (ASP-DAC).

We won the Best Poster/Demo Award at ACM Conference on Security and Privacy in Wireless and Mobile Networks (WiSec) in 2025, the Best Hardware Demo Award: 2nd Place at IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2024 in 2024, IEEE TC Featured Paper of the Month in 2022, the Best Paper award at IEEE AsianHOST in 2018, the Best Paper Nomination in ACM GLSVLSI in 2017.

Our work has been supported by funding and donations from NSF (Grant ID: 2523805, 2519390, 2438599 2245156, 2042700), NSA, MIPS, NASA-JPL, ARLIS, and Xilinx.

open positions

We always have fully-funded GRA positions for motivated Ph.D. students to participate in hardware design and computer security research. You can find more details about the position here.

If interested, please send an email along with your resume and transcripts to marafin(at)gmu(dot)edu.

news

Jul 30, 2025 New paper alert: Yanze has two paper accepted at ICCD 2025 and PACT 2025!!! Congratulations Yanze!
Jul 28, 2025 We have won a new NSF grant titled Collaborative Research: CISE Crosscutting Small: SaTC: SAGE: Secure Accelerators for Next-Generation Foundation Models!!!
Jul 08, 2025 We have won a new NSF grant titled Collaborative Research: CyberTraining: Implementation: Small: CyberSTAR: CyberTraining for Secure Transportation and Reliable Autonomy!!!
Jun 11, 2024 Our paper titled “Ising Model Processors on a Spatial Computing Architecture” has been accepted to the 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS 2024). Congratulations, Yanze!

selected publications

  1. ATHENA: Accelerating Torus Fully Homomorphic Encryption on Energy-Efficient Heterogeneous Architecture
    Yanze Wu, and Md Tanvir Arafin
    In Proceedings of the 43rd IEEE International Conference on Computer Design , Dallas, TX, USA, 2025
  2. Energy-Efficient Acceleration of Hash-Based Post-Quantum Cryptographic Schemes on Embedded Spatial Architectures
    Yanze Wu, and Md Tanvir Arafin
    In Proceedings of the 2025 International Conference on Parallel Architectures and Compilation Techniques (PACT) , Irvine, California, USA, 2025