DAC · DATE · PACT · ICCD
Accelerators for post-quantum & verifiable computing
NTT, sum-check, and hash-chain kernels mapped onto Versal AI Engines and edge GPUs so zkSNARKs, FHE, and XMSS run within an embedded power budget.
Tanvir Arafin
Assistant Professor · Cyber Security Engineering · George Mason UniversitySecure computer architecture for autonomous and post-quantum systems.
The SPIRE Lab finds side-channel and fault-injection weaknesses in emerging hardware, breaks and hardens autonomous systems, and builds spatial accelerators that make post-quantum cryptography and verifiable computing practical at the edge.
Research thrusts
01 — 03 HOST · AsianHOST · GOMACTech
Roots of trust & side channels
Power, electromagnetic, and timing leakage in NTT and lattice hardware. Fault injection against hash-based post-quantum signatures, and the countermeasures that survive it.
HOST · MOST · NSF CyberTraining
Secure autonomy & transportation
LiDAR spoofing against SLAM, ROS 2 attack surfaces, CAN-bus exploitation, and the cyberinfrastructure that trains the next automotive security workforce.
Selected publications
all publications →Funded projects
15 projects · $10.1M → SAGE: Secure Accelerators for Next-Generation Foundation Models PI · $275K share CyberSTAR: CyberTraining for Secure Transportation and Reliable Autonomy Lead PI · $200K share CyberAI Innovation: Modernizing IoT/Edge Cybersecurity Education Co-PI · $200K share EAGLE: CyberCorps Scholarship for Service Co-PI · $791K share GAIA and CASPER: GPU power attacks; analog sensing for the grid PI · $100K share
SPIRE Lab
People, projects, and photos Meet the SPIRE Lab.
Student-led work from the lab has reached DAC, HOST, DATE, and PACT, and swept the top three spots at the 2024 National Transportation Cybersecurity Competition.
